The present invention relates to a DC-to-DC static converter, operating in a discontinuous mode, particularly suited to be integrated in a multisystem chip.
In electronic systems it is often necessary to make available a stabilized DC voltage of a higher value than the DC supply voltage (VCC), which may or may not be stabilized. A particular voltage boosting converter circuit is employed for this purpose, the power circuit of which comprises an inductor connected to the DC supply bus and driven by a low-side driver (switch) to cyclically charge, a recirculation diode for discharging the energy stored in the inductor during a cyclic connection to ground through the switch and a filter capacitor connected between output node and ground. Control and regulation of the voltage on the output node is implemented by a control circuit that controls the turn-on and the turn-off of the switch.
In other applications, it may be necessary to make available a stabilized DC voltage lower than a stabilized or unstabilized DC voltage present on a power supply line. In this case, a step-down DC-to-DC converter, for example a so-called buck converter is used. The literature on these converter circuits is conspicuous and well known. The volume "Switch Mode Power Supply Handbook" by Keith Billings, which is hereby incorporated by reference, contains a broad review of these circuits under chapter 20, entitled "DC-to-DC Switching Regulators". The control system of these converter circuits may be based upon the regulation of the duty-cycle of the switching of the power switch which is driven at a timing frequency established by a local oscillator or derived from a general system's clock frequency (that is a PWM control system) or hysteretically in function of the output voltage. The mode of operation of the converter may also be continuous or discontinuous. In a continuous mode of operation, the inductor is always crossed by an electric current, that is the switch commutes again before the discharge current of the inductance toward the user circuit, through the discharge (recirculation) diode, becomes null. Conversely, in the case of a discontinuous mode of operation, the switch is activated again only after the discharge current of the inductance has become null.
Commonly, the continuous mode of operation is preferred for relatively high power systems, or when it is important to minimize the residual "ripple" on the stabilized output voltage and to keep the intensity of electromagnetic disturbances generated by the switching as low as possible. The discontinuous mode of operation is often preferred in relatively low power systems because it requires a far simpler control circuit.
Converters of this latter type, that is operating in a discontinuous mode, are increasingly integrated in large chips which contain complex electronic systems (or even multiple systems together). In these important areas of application, there is a need to minimize the pins or leads of the integrated device required by the converter circuit for the connection of components that must be necessarily external to the integrated circuit, as for example the inductor, the output buffer (filter) capacitor, and eventual stabilization networks of the control loop. Moreover, the use of miniature external inductors, in the form of "chip-inductor", having a relatively high (parasitic) series resistance and a low saturation current, may, in the case of circuits destined to function with a relatively low supply voltage, provoke missed start up and/or risk situations because of an insufficient limitation of current peaks.
Commonly, the control and regulation circuit of these converters comprises an error amplifier (E/A) capable of comparing the voltage present on the output node with a reference voltage and generating an amplified error signal which is input to a comparator that controls the turn-on and the turn-off of the output power transistor of the converter (that is the closing and opening of the switch that intermittently connects to ground the inductor).
The use of an error amplifier, that is of a high gain stage in the regulation loop, determines the need of employing a stabilization network, which may require access through a dedicated pin or lead of the integrated circuit to the output node of the error amplifier. In complex chips, the number of pins required may not be compatible with a limited overall availability of pins. On the other hand, the realization of integrated stabilization networks (to substitute for the use of external components) requires the integration of complex circuits requiring a substantial area of integration.
A different approach is employed in the integrated device MC34063 of Motorola. According to this known commercial device, the control circuit of the converter does not employ an error amplifier. Of course, since the output capacitor discharges during the turn-off phase of the switching transistor (charge phase of the inductor), the turn-off of the switching transistor cannot be controlled by the comparator that monitors the output voltage of the circuit. In fact the comparator may exclusively control the turn-on of the output transistor, while its turn-off must be controlled by other means. In the MC34063 integrated circuit, the output switching transistor is turned off by employing an oscillator dedicated to this purpose.
The approach adopted in the MC34063 device does not guarantee a discontinuous mode of operation, i.e. does not guarantee the nullifying of the discharge current of the inductor before the turn-on of the output switching transistor (closing of the output power switch). Consequences may include irregular current wave forms in the inductor, an excessive sensitivity to disturbances of the stabilized output voltage, and more generally an undeterminable ripple on the current flowing through the inductor and on the stabilized output voltage.
There is a need for a converter, functioning in a discontinuous mode, whose integration on a chip is simplified by requiring a minimum number of dedicated pins, without requiring the use of a local oscillator (or of frequency divider circuits of a clock frequency available within the chip), and which is compatible with a relatively low supply voltage and with the use of external inductors having a relatively high series resistance (chip-inductor), while permitting the use of an output switching transistor of a field effect type in order to optimize conversion efficiency.
All these objectives are met by a converter based on a preset and substantially constant interval of conduction of the switching output transistor, which employs a circuit capable of monitoring both the current through the switching power transistor (that is the charge current of the inductor) and the discharge current of the inductor and a logic circuit which guarantees a discontinuous mode of operation of the converter. These criteria avoid the need for an error amplifier, which would require access to its output node for realizing the necessary stabilization of the control loop, as well as the need for a local oscillator or frequency divider of a system's clock frequency.
According to a first embodiment of the invention, the turn-off signal is generated by employing a comparator of the voltage present on the output power switch. This avoids using a sensing resistance in series with the output power transistor. Use of either a delay network between the output of a driving flip-flop of the output switching transistor and an input of the logic control circuit, or a different arrangement for masking the voltage on the output switching transistor during an OFF phase thereof, allows a new turn-on of the output switching transistor even if the voltage across its current terminals is not yet above a reference voltage, as will be described more clearly further on this description.
According to a different embodiment of the invention, a turn-off signal of the output switch is obtained by using a comparator monitoring the voltage on a sensing resistance, purposely connected in series with the output power transistor.
In practice, the choice of one or the other embodiment may be determined by the particular conditions of use of the converter. For example, the output power switch can be realized in the form of a MOS transistor rather than in the form of a bipolar transistor, for reducing energy losses by exploiting the inherently lower on-resistance RON of a MOS transistor as compared with a bipolar transistor of similar current-handling capacity, as well as the non-saturating characteristic and shorter turn-on and turn-off times of the MOS transistor. In this case, the presence of a particularly low supply voltage VCC (e.g. 3 V) may cause precarious start-up conditions of the circuit. In these cases, the absence of a sensing resistance in series with the source of the output MOS transistor may decisively improve the start-up conditions, even with a relatively low supply voltage.
In either case, the circuit of the invention essentially employs three comparators, the output signals of which are handled by a logic circuit which controls a driving flip-flop. Essentially, the only pins required by the converter of the invention are those necessary for connecting the inductor and the output filter capacitor.